This application is related to a concurrently filed application entitled xe2x80x9cMethod For Reducing Current Surge Using Multi-Stage Ramp Shuntingxe2x80x9d, the subject matter of which is incorporated herein in its entirety.
This invention relates generally to suppression of noise, and more particularly to suppression of noise resulting from current surges in an integrated circuit.
Current surges in circuits comprising electronic components are well known. A current surge is a sudden, almost instantaneous, change (usually an increase) in the current that is flowing through a circuit or a component. In an integrated circuit, such a surge may result from a circuit block within the integrated circuit waking up from a sleep mode, for example. A current surge or large change in current is illustrated in FIG. 1.
In FIG. 1, the current I is, initially, at a low value IL while a circuit block is in a sleep mode. This mode may result from inactivity or low activity of the circuit block for a predetermined amount of time or until a certain event occurs. Upon expiration of the predetermined amount of time or the occurrence of a triggering event, such as the activation of the circuit block (i.e., no longer in a sleep mode) at time tH for example; a current surge takes place. The surge may be caused by many factors such as an increase in impedance in another part of the integrated circuit relative to the impedance in the circuit block for example. Since the circuit block is no longer in the sleep mode, it may be considered to be in a wake-up mode. At time tH, therefore, the value of the current IL increases drastically to a much higher value IH almost instantly. The current in the circuit block may remain at this value (i.e., IH) until another sleep mode at time tL decreases the current to IL. In addition to subjecting circuit components to stresses, a large change in the current results in undesirable noise. Among other things, noise causes power and ground bounce that reduces the driving capability of a transistor leading to timing errors.
Other approaches for suppression of current surge include U.S. Pat. No. 5,726,849 (issued to Nakamura) for example. In Nakamura, a resistor element in parallel with a switching element is connected in series with an input circuit to break the circuit in response to an overcurrent or over heating. Another approach is the method of U.S. Pat. No. 5,079,455 (issued to McCafferty et al.), which discloses a current limiting circuit. Yet another approach is disclosed in U.S. Pat. No. 3,935,511 (issued to Boulanger et al.). According to Boulanger, a resistive device is provided in series with a load at initial turn-on, the device being shunted once the current inrush has passed.
Each of these patents involve the placement of a protective circuit (or circuit element) in series with another circuit (or circuit element) that is being protected from a current surge. The protection of circuit elements from current surge is needed in these patents as the elements cannot tolerate the current surge. Current surge subjects unprotected circuit elements to conditions that the elements are not designed for. As a result, the elements malfunction or more likely, the elements are destroyed.
A ramp loading circuit for slowing current change in a circuit block is described. The circuit may include a plurality of load circuits placed in parallel with the circuit block and a control circuit. Each load circuit may provide a path for current flow when the load circuit is activated. Each load circuit may also be configured to allow a gradual decrease in current flow through the path when the load circuit is deactivated. The control circuit may be configured to deactivate each load circuit before the circuit block enters the sleep mode.